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Quantum Computer Architecture
A Classical Architecture For Digital Quantum Computers
Scaling bottlenecks the making of digital quantum computers, posing challenges from both the quantum and the classical components. We …
Fang Zhang
,
Xing Zhu
,
Rui Chao
,
Cupjin Huang
,
Linghang Kong
,
Guoyang Chen
,
Dawei Ding
,
Haishan Feng
,
Yihuai Gao
,
Xiaotong Ni
,
Liwei Qiu
,
Zhe Wei
,
Yueming Yang
,
Yang Zhao
,
Yaoyun Shi
,
Weifeng Zhang
,
Peng Zhou
,
Jianxin Chen
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Quantum Instruction Set Design for Superconducting Processors
The intersection of quantum hardware and software is epitomized in the quantum instruction set, a pivotal factor in system performance. We have been at the vanguard of designing and implementing quantum instruction sets that optimize system efficiency. Our
PMW (Phase-shifted MicroWave) scheme
has gained widespread adoption in the industry. Notably, our
SQiSW (Square Root of iSWAP) scheme
has been published in the prestigious Physical Review Letters and then adopted by Google. Furthermore, our
recent AshN scheme
has been accepted by ASPLOS24 and is currently being implemented by several leading hardware teams.
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The First Prototype System for Fault-Tolerant Quantum Computing
We developed a prototype system, a trailblazer in supporting fault-tolerant quantum computing. Its design ingeniously addresses scalability, ensuring that control overhead does not increase with the number of qubits.
Integrated with our modular decoding firmware, this system demonstrates unparalleled scalability potential in the realm of fault-tolerant quantum computing.
We have established and rigorously tested a comprehensive end-to-end system using our in-house fluxonium quantum chip. This work has been recognized and published in the
ACM Transactions on Quantum Computing
.
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The First Scalable Real-time Decoding Firmware
Fast classical processing is essential for most quantum fault-tolerance architectures. We pioneered the slicing-window parallel decoding approach that provides fast classical processing for the surface code through parallelism. This scheme significantly accelerates classical processing by leveraging parallelism, effectively overcoming a major bottleneck in fault-tolerant quantum computing for the first time. Our work has garnered widespread recognition within the scientific community.
It has been featured in presentations at leading institutions like MIT and Duke. Additionally, our team has been honored with an invitation to speak at the QEC23, a prominent conference on quantum error correction.
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